DSP-10 from W7PUA: Serial Bus Diagnostics

Introduction In order to reduce the number of wires that connect between the EZ-Kit Lite DSP board and the main DSP-10 board, a serial communications system is used. This consists of four digital wires:

1. A Data line that is set high or low by FL0 in the DSP.
2. A Clock line that is set by FL2 in the DSP.
3. An Enable 1 line that is set by PF7 in the DSP.
4. An Enable 2 line that is set by PF6 in the DSP.

The Clock and Data lines are common to all the serially programmed parts. The Enable 1 is used to tell the two 74HC595 shift registers and the LMX1501A synthesizer that they should heed the data that has been sent. Enable 2 serves the same function for U7, the MC145170 synthesizer. Because of differences in the programming protocals, the Enable 2 is a short pulse at the end of the programming sequence, and Enable 1 is a gate that surrounds all of the serial data. In both cases the data is first set and then clocked by the rising edge of the clock pulse.

The details of the programming procedure are not covered here, but can be found in the source code for the DSP programs. They are not particularly important at the hardware checkout part of the DSP-10. If you want to find out more about the programming details you will need to be study the program code along with the data sheets for the individual parts being programmed.

Preliminaries First, we need to have the board in a known state. This is normally done by a combination of the DSP and the PC programs. In order to simplify the procedure a special program is available that does only the serial line tests. It runs in the DSP alone. To use this, first be sure that the EZ-Kit is reset by using the RESET button. This takes several seconds, possibly with annoying music. Then load the diagnostic program, udiag1.exe, into the EZ-Kit DSP using either EZLD, EZFAST or the Analog Devices Windows loader. Set this to Go (run the program) at program location 0.

Once loaded, the udiag1.exe program brings each of the four serial lines high, one at-a-time, for about 5 seconds. The red LED on the EZ-Kit Lite (FL1) is used to tell you which line is high. The order of the signals is:

  1 Blink    FL0  P101-3 on Main Board         P3-33 on EZ-Kit
  2 Blinks   FL2  P101-4 on Main Board         P3-35 on EZ-Kit
  3 Blinks   PF7, En1, P101-11 on Main Board   P3-32 on EZ-Kit
  4 Blinks   PF6, En2, P101-12 on Main Board   P3-31 on EZ-Kit

This all happens slowly enough that you can trace these signals through with any Voltmeter. This will normally show any wiring problems.

Note that P3 pins 31 and 32 are reversed from the QST schematic. This correction was also listed in the assembly notes. The values above should be correct!

Now load the UHF3.EXE dsp program and UHFA.EXE PC program (see README16.TXT.) Check all the DC Voltages listed in QST. With the PC program running with RF input (Alt I) and the variable hardware=1 in the uhfa.cfg file, it is also now possible to check the operation of the serial loading by changing the RF gain with the Shift F7 and Shift F8 commands. The following U107 shift register Voltages should be seen:

RF Gain QA QB QC QD QE QF QG QH
  100   0  0  0  5  0  0  0  5 Volts 
  94    0  0  0  5  0  0  5  0
  88    0  0  0  5  0  5  0  0
  82    0  0  0  5  5  0  0  0
  76    0  0  5  0  5  0  0  0
  70    0  5  0  0  5  0  0  0
  64    5  0  0  0  5  0  0  0

These U107 Voltages should be seen if the serial lines are working, regardless of what is happening in the PLL IC's.

And for all RF gain settings, the following Voltages correspond to being in a receive state (The PC screen should have the word 'RECEIVE' in the upper left part of the screen, not 'Audio' or 'Transmit'.

U108-15  0 V
U108-1   0 V
U108-2   5 V
U108-3   0 V
U108-4   0 V
U108-5   0 V
U108-6   0 V
U108-7   0 V